The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 1986

Filed:

Dec. 27, 1982
Applicant:
Inventor:

Gary L Stuhlmiller, Mesa, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307442 ; 307297 ; 307443 ; 307491 ; 330261 ;
Abstract

A circuit which may be utilized with a EIA RS 422/423 line receiver to guarantee that the output of the receiver goes to a known output logic stage when there is no signal supplied at the input thereof. The circuit comprises a pair of substantially indentical transistor circuits coupled in parallel between a power supply bus. One transistor of a particular one of the transistor circuits is fabricated with a smaller emitter area with respect to its counterpart transistor in the other transistor circuit. Thus, a voltage difference is established between the emitter contacts of the two transistors which produces the voltage offset. This voltage offset is utilized to dirve the output of the line receiver to said output state absence an input signal supplied to the receiver.


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