Inverter with improved operating efficiencies

Abstract

An inverter circuit is provided for use with a DC power supply and includes a transformer having a center-tapped primary coil and a secondary coil as well as a switch and a switch controller operating to maintain a constant RMS output voltage. Improvements in the inverter circuit include a switch formed of individual discrete and Darlington transistors connected in parallel so that the discrete transistors predominantly carry the load during low load operation and the Darlington transistor during high load operation. A switch controller controls the switch using pulse width modulation and may include generation of a signal providing a first-order linear approximation of the mean square voltage on the output as determined on the non-load side of the primary coil of the transformer, a switch driver controller which keeps the transistors of the switch operating just barely at saturation, and a near no-load circuit which substantially reduces the operating time of the switches while maintaining minimal energy output. Further, spike suppression means is provided for returning spike energy to the battery supply. Also, a circuit protector, sensing the voltage across the transistors, determines when an excessive load is being drawn and reduces the operation of the switches to a level which they can tolerate for a period of time before completely effectively breaking the circuit from operation.