The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1986

Filed:

Dec. 12, 1983
Applicant:
Inventors:

Matthew L Snook, Loveland, CO (US);

John E McDermid, Loveland, CO (US);

William J Nicolay, Loveland, CO (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324 66 ; 324 51 ; 324 / ; 3241 / ;
Abstract

An apparatus and a method is provided for verifying electrical coupling between a first contact point of an electrical device on a circuit board and a first connection pin, on a board tester. Within the tester, a JK flip-flop is electrically coupled to the first connection pin through an amplifier. A Q output of the JK flip-flop is initialized to a logic 0. An electrical probe with an electrical voltage is stroked across the first contact point and any other contact points on the circuit. If the first contact point is electrically coupled to the first connection pin, a logic 1 will be held on the Q output of the JK flip-flop. If there is no electrical coupling, then a logic 0 will be held on the Q output. By reinitializing the JK flip-flop and electrically coupling it to another connection pin, electrical coupling between another contact point and another connection pin may be tested.


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