The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 1985
Filed:
Jun. 29, 1983
Stefan P Jackowski, Endicott, NY (US);
James T Moyer, Endwell, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Interface lines interconnect a first circuit to a second circuit. When an abnormal circuit condition affects the interface lines, such as an open circuit or a short circuit condition, the operation of the first and second circuit is detrimentally affected. This invention determines the existence of abnormal circuit conditions in one or more lines of a group of interface lines without using redundant duplex lines. The interface lines are subdivided into a first group, which are used when the apparatus of the present invention is being used to locate abnormal circuit conditions, and a second group, which are not used when the apparatus of the present invention is being used to locate abnormal circuit conditions. Each line of the first group is connected, at its input side, to a corresponding input terminal of a first exclusive-or gate and, at its output side, to a corresponding input terminal of a second exclusive-or gate. The first and second exclusive-or gates are input to a matching circuit, an output signal from the matching circuit indicating the existence of an abnormal circuit condition in the first group of lines. One line of the first group is connected to an input side of the second group. The output side of the second group is connected to an additional input terminal of the second exclusive-or gate. An output signal from the matching circuit indicates the existence of an abnormal circuit condition in at least one line of either one or both of the first and second group of lines.