The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 1985
Filed:
Jul. 29, 1983
Yoshio Oida, Funabashi, JP;
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Abstract
An input logic circuit has a plurality of pairs of bipolar transistors. The bases of each pair of transistors receive a logic signal and its inverted signal, respectively, and the emitters thereof are coupled to each other. A signal transfer circuit has a pair of bipolar transistors the emitters of which are coupled to each other and the bases of which respectively receive an output signal and its inverted output signal from the input logic circuit. The signal transfer circuit is operated in response to a synchronizing signal. A signal hold circuit has a pair of bipolar transistors arranged such that their emitters are connected to each other, their bases and collectors are cross-coupled, and their bases respectively receive an output signal and its inverted output signal from the signal transfer circuit. The signal hold circuit is operated in response to the synchronizing signal. The signal transfer circuit and the signal hold circuit constitute an ECL synchronous latch.