The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 1985
Filed:
Jul. 18, 1983
Applicant:
Inventor:
Cordell E Prater, Johnson City, TN (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307475 ; 307270 ; 307279 ;
Abstract
A PMOS input buffer compatible with logic voltage levels provided by NMOS or TTL microprocessor means uses a limited number of transistors of limited size for driving a load in response to such logic and is adapted for use under widely varying operating conditions.
Quick Actions:
Prater, Cordell. (1985). Pmos input buffer compatible with logic inputs from an nmos (U.S. Patent No. 4553051). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4553051
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