The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 1985
Filed:
Sep. 13, 1983
Katsuji Fujita, Yokohama, JP;
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Abstract
A semiconductor protective device has a semiconductor substrate of one conductivity type, the first island region being of a conductivity type opposite to that of the semiconductor substrate; second and third regions formed in a surface layer of the first region and being of the same conductivity type as that of the semiconductor substrate; a first transistor emitter region formed in the surface region of the second region and being of a conductivity type opposite to that of the semiconductor substrate; a low-resistance region formed across the second region and the third region; a first electrode formed on the first transistor emitter region; a second electrode; a third electrode connected to the second electrode by the low-resistance region; a first wiring layer connecting the first electrode and the third electrode and connected to an external terminal, the resistance of the semiconductor region between the first electrode and the first transistor emitter region being lower than that of the semiconductor region between the first electrode and the third electrode; and a second wiring layer connected between an internal circuit and the second electrode. By a combination of resistors and bipolar transistors, the semiconductor protective device can absorb both positive and negative external surge inputs, thereby protecting the internal circuit.