The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 1985
Filed:
Mar. 07, 1983
Applicant:
Inventors:
Joseph Pumo, Austin, TX (US);
Marc J Belleville, Grenoble, FR;
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307269 ; 307453 ; 307481 ; 307482 ; 307578 ;
Abstract
A clocked buffer circuit is provided which uses a self-bootstrapping transistor to provide a full power supply output signal in response to an input signal and a full power supply clock signal. The self-bootstrapping transistor is disabled by a delay circuit prior to the removal of the clock signal so that the output signal is still provided after the removal of the clock signal. That the output signal reaches full power supply is ensured because the disabling effect of the delay circuit is triggered by the output signal itself.