The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 1985
Filed:
Sep. 16, 1982
Applicant:
Inventor:
Junichi Matsunaga, Yokohama, JP;
Assignee:
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 23 ; 357 68 ; 365174 ; 365 51 ;
Abstract
A semiconductor device includes a dynamic memory area formed in a semiconductor substrate and set in an inequilibrium potential state, and a plurality of MOS transistors which emit minority carriers or more than a predetermined number into said semiconductor substrate during operation in a saturation region. Each of the MOS transistors is so arranged that a prolonged line extending in a direction from the source region to the drain region may cross the dynamic memory area.
Quick Actions:
Matsunaga, Junichi. (1985). High density integrated circuit device with mos transistor and (U.S. Patent No. 4539580). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4539580
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile