The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 1985
Filed:
Dec. 27, 1982
Birney D Dayton, Nevada City, CA (US);
The Grass Valley Group, Inc., Grass Valley, CA (US);
Abstract
A circuit for converting ECL logical signals into TTL logical signals comprises a differential amplifier defining two current paths leading to a negative reference potential source. When the ECL input signal is logical zero, the first current path is closed and the second current path is open, and vice versa when the input signal is logical one. A first transistor has its base connected to the first current path and its emitter connected to a positive reference potential source, and is biased by a load resistor connected to the first current path. A second transistor has its emitter connected to the collector of the first transistor and its base connected to the second current path, and is biased by a second resistor. When the input ECL signal is logical one, the first current path is open and the first and second transistors are on and off respectively, the potential at the output terminal of the circuit being limited by a clamping diode connected between the base and collector of the first transistor. When the input ECL signal is logical zero, the first transistor is non-conductive and the second transistor behaves as an emitter follower, and the potential at the output terminal is close to ground.