The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 1985

Filed:

Jul. 02, 1984
Applicant:
Inventor:

Pieter J Jochems, Heeze, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
29571 ; 2957 / ; 29578 ; 148-15 ; 148175 ; 148187 ; 357 231 ; 357 91 ;
Abstract

A method of manufacturing a semiconductor device is provided in which semiconductor circuit elements are provided in regions formed by diffusion from one or more buried layers into an epitaxial layer. The diffusion is carried out such that a surface layer having substantially the same doping as the original epitaxial layer is left above the diffused into epitaxial layer above the buried layer. The surface layer serves as a reference doping for insulated gate field effect transistors to be formed. This is of a particular importance for threshold voltage determinations in CMOS circuits having adjoining 'twin tub' regions diffused from buried layers of opposite conductivity types.


Find Patent Forward Citations

Jochems, Pieter. (1985). Method of making semiconductor devices by forming an impurity adjusted (U.S. Patent No. 4535529). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4535529

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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