The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 1985
Filed:
Jun. 14, 1983
George L Streckmann, Dallas, TX (US);
Ralph A Harris, Hockley, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A compound floating point amplifier for amplifying an analog signal for presentation to an analog-to-digital converter has two amplifying sections to achieve a wide dynamic range. A signal representative of the rate of change (slew) is derived from a differentiating circuit. The analog signal and the slew rate signal are combined and if both are below a predetermined threshold level, a single step amplification is made in a dual gain amplifier. If both signals are not below the threshold, then there is unity gain through the dual gain amplifier. A sample and hold circuit receives the output of the dual gain amplifier and stores it. Subsequently, the stored voltage is impressed on a binary ladder attenuator which provides a digital word output indicating the required amplification. The voltage stored in the sample and hold circuit is also impressed on a binary gain amplifier system and amplified in accordance with the digital word from the binary ladder attenuator. The dual gain amplifier provides an input to an adder, indicating the amount of the step amplification which is added to the digital word from the binary ladder attenuator to provide a digital word indicative of the overall gain of the compound floating point amplifier.