The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 1985

Filed:

Oct. 02, 1980
Applicant:
Inventor:

Philip C Smith, Columbia, MD (US);

Assignee:

Westinghouse Electric Corp., Pittsburgh, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; G11C / ;
U.S. Cl.
CPC ...
357 237 ; 357 235 ; 357 239 ; 357 41 ; 357 49 ; 365104 ; 365184 ;
Abstract

A semiconductor device structure incorporating the edge of silicon island as a surface for diffusing impurities is described to form the drain and source of an MOS transistor and interconnections therebetween to form semiconductor devices such as MOS transistors, variable threshold MNOS transistors, row decoders for use in memories, memory arrays, interconnect crossovers, and high-voltage transistors. A semiconductor process is described for fabricating the above devices utilizing four or five masks. The invention overcomes the problem of high-density integrated circuits by utilizing the edges of silicon islands on an insulating substrate as well as the upper surface of the islands. In addition, contact metallizations are non-critical because of the Schottky barrier diode formed between aluminum and n-type silicon. Both n and p-type semiconductor devices are described.


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