The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 1985

Filed:

Mar. 14, 1983
Applicant:
Inventors:

Kornelis A Mensink, Brummen, NL;

Hendrik L Brouwer, Dieren, NL;

Assignee:

Vitafin N.V., Curacao, AN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323316 ; 323314 ; 323267 ; 307304 ; 307496 ;
Abstract

A self-adjusting voltage regulator circuit on a CMOS chip, for use with CMOS digital and/or analog circuit, providing a voltage which is selected in accordance with the characteristics of the chip to optimally current control operation of CMOS circuits on this chip. The voltage regulator circuit has a reference CMOS pair with a predetermined geometry, and current means are provided for driving a current through said reference pair which is adjusted to operate the pair at a desired point of current controlled operation. The voltage across the reference pair is utilized to provide the regulated voltage to other CMOS pairs, which pairs have respective geometries of predetermined relation to the reference pair geometry, whereby the regulated voltage and the relative geometry provide current controlled operation of each such CMOS pair.


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