The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 1985
Filed:
Jun. 29, 1983
Dennis C Banker, Newburgh, NY (US);
Frank A Montegari, Wappingers Falls, NY (US);
John P Norsworthy, Fishkill, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Logic circuit means for providing a binary output which is a predetermined logical function of a plurality of binary inputs, said logic circuit means including: at least first, second and third push-pull Darlington current sink (PPDCS) logic circuits, each said PPDCS logic circuit comprising: first, second and third transistors, each of said first, second and third transistors having an emitter, base and collector, said collector of said third transistor connected to a first source of potential and said emitter of said second transistor connected to a third source of potential; input circuit means, said input circuit means being adapted to receive n binary inputs, where n is a positive integer having a magnitude of two or greater, said input circuit means being connected to said collector of said first transistor and said base of said third transistor; a first resistor connected between said emitter of said first transistor and a second source of potential; a second resistor connected between said first source of potential and a common connection of said base of said first transistor and said base of said second transistor; a third resistor connected between said base of said third transistor and said first source of potential; a first diode connected across said base-collector junction of said first transistor; a second diode connected across said base-collector junction of said second transistor; output circuit means connected in common to said collector of said second transistor and said emitter of said third transistor, said output circuit means electrically manifesting the logical binary NOR function of said n binary inputs received by said input circuit means; and interconnection means interconnecting the output circuit means of each of said at least first, second and third PPDCS circuits, said interconnection means including an output terminal for manifesting said binary output of said logic circuit means.