Amplified gate thyristor with non-latching amplified control transistors

Abstract

A diode is integrated on a common substrate with a thyristor to form a parasitic transistor in the gate circuit of the thyristor for amplifying gate current thereto. In addition, gate sensitivity is further enhanced by this formation because the injection efficiency across the thyristor anode-base junction is increased, thus reducing the amount of gate current necessary to trigger the thyristor. The diode cathode, diode anode and substrate form an emitter, base and collector, respectively, of the parasitic transistor. The junction formed by the substrate and the thyristor anode region is forward biased and supplies collector current for the parasitic transistor, this junction being inactive with respect to the junction formed by the substrate and the diode anode region. Thus gate current flowing through the diode to the gate of the thyristor is increased by the additional collector current afforded by the parasitic transistor. This parasitic transistor formation enables the use of a shorted-emitter thyristor while also achieving a high degree of gate sensitivity without the usual drawbacks of temperature and dv/dt sensitivity associated with a nonshorted-emitter high gate sensitivity thyristor.