The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 1985
Filed:
Jan. 03, 1983
Kirk N Holden, Lockhart, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
An n-bit adder circuit, where n is an integer, for providing carry select addition of two input numbers is provided. A rank ordered plurality of section adders each have a plurality of full adders. Each full adder utilizes a single half adder to provide two sum bits which are coupled to a multiplexer which is an integral part of each section adder. One sum is for a carry-in and the other sum is for no carry-in. A method of minimizing logic circuitry which provides carry bits and carry sum select bits is provided. The carry bits and carry sum select bits control which of the two sums are provided by each section adder. By providing the carry bits and carry sum select bits in complement form every other order of section adder, logic circuitry and logic gate delays are minimized.