The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 1985
Filed:
Dec. 23, 1982
Stephen L Wong, Oakville, CA;
Clement A Salama, Toronto, CA;
The University of Toronto Innovations Foundation, Toronto, CA;
Abstract
A Metal-Oxide Semiconductor (MOS) high gain amplifying stage which overcomes the inherently low transconductance, gm, of MOS transistors is described. This is achieved by using a specially configured load transistor in combination with a driver transistor. The load transistor is provided, by means of positive feedback, with a current generator which is dependent on the output voltage of the stage and has an effective negative output conductance. The positive feedback is achieved by connecting an appropriate attenuation stage between the output and the input of the load transistor. By the cancellation of output conductances between the driver and load transistors, a near infinite voltage gain can be achieved despite resistive loading at the output of the amplifier. The MOS amplifying stage has application in amplifiers, comparators and oscillators. A complementary metal-oxide-semiconductor (CMOS) implementation has been realized but the principle is equally applicable to single channel (NMOS or PMOS) MOS technology.