The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 1985
Filed:
Aug. 13, 1982
Applicant:
Inventors:
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307451 ; 307576 ; 307585 ; 307594 ; 307475 ;
Abstract
A buffer circuit for driving a C-MOS inverter, including a first inverter and a second inverter for driving a p-MOS transistor, respectively, and an n-MOS transistor in the C-MOS inverter. Each of the inverters includes at least three transistors connected in series. At least one of the three transistors in each inverter is driven by a delay circuit so that during a transition period of the C-MOS inverter, simultaneous conduction of current through the C-MOS inverter is prevented.
Quick Actions:
Suzuki, Yasuo. (1985). Buffer circuit for driving a c-mos inverter (U.S. Patent No. 4518873). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4518873
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile