Manufacturing method for mis-type semiconductor device

Abstract

A manufacturing method for an MIS type semiconductor device features in the preferred form a single masking operation used to define source, gate, and drain windows simultaneously in an upper insulating oxide layer disposed over a semiconducting polysilicon layer, the polysilicon layer being separated from the semiconductor substrate by a thin insulating oxide layer serving as the gate oxide. By subsequent deposition of an overall capping nitride layer, followed by selective removal of layers, using relatively low resolution photoresist and portions of the layers themselves as intermediate etching barriers, and by finally converting the polycrystalline layer to an oxide except where it is protected from oxidation by the presence of a nitride stripe over a gate window, the resulting gate electrode is precisely centered between the source and drain windows, and is sealed on all three sides by a protective oxide layer.