The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 1985
Filed:
Oct. 06, 1983
Applicant:
Inventor:
Yuan Taur, Armonk, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
148-15 ; 29571 ; 2957 / ; 29578 ; 148187 ; 357 42 ; 357 91 ;
Abstract
A process for forming self-aligned complementary n.sup.+ and p.sup.+ source/drain regions in CMOS structures using a single resist pattern as a mask to form both the n.sup.+ channel implant and then the p.sup.+ channel implant. The resist pattern is formed using conventional lithography techniques to form an implant mask which covers the p.sup.+ channel region while the n.sup.+ source and drain regions are ion implanted. The resist mask is then used as a lift-off mask in order to cover the n.sup.+ channel region while the p.sup.+ source and drain regions are ion implanted.