The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 1985
Filed:
Jan. 11, 1983
David W Page, San Diego, CA (US);
LuVerne R Peterson, San Diego, CA (US);
Burroughs Corporation, Detroit, MI (US);
Abstract
This disclosure relates to a programmable logic array having an AND array disposed for receiving n input signals, an OR array providing k output signals on k output lines and m term lines coupling the AND and OR arrays together. New and improved AND and OR arrays are disclosed wherein the AND array includes n X m cells and each cell has first and second transistor means coupled in series between one of the term lines and a reference potential. Each cell includes a storage element that has an output terminal coupled to the control element of the first transistor means and one of the n input terminals is coupled to the control element of the second transistor means. The OR array includes m X k cells wherein each cell has third and fourth transistor means coupled in series between one of said output lines and a reference potential. Each of the OR array cells also includes a storage element having an output terminal coupled to the control element of the third transistor and one of the m term lines is coupled to the control element of the fourth transistor.