The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 1985
Filed:
May. 12, 1982
Susumu Mori, Tokyo, JP;
Hideaki Yamada, Tokyo, JP;
Nippon Electric Co., Ltd., , JP;
Abstract
A NAND logic gate circuit having a first input circuit receiving a first input signal, an inverter circuit for inverting the output of the first input circuit, a second input circuit for receiving a second input signal, an AND gate circuit for producing a logical AND output signal in response to the outputs of the inverter circuit and the second input circuit, and a PNP transistor responsive to the second input signal having a low value for controlling the value of the output signal of the first input circuit independent of the value of the first input signal. The NAND gate circuit has a faster response time to changes in the value of the first input signal than comparable prior art circuits and reduces the current flow to the second input terminal when the first input signal is high and the second input signal is low.