The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 1985
Filed:
Jun. 30, 1982
Applicant:
Inventors:
Surender K Gulati, Catasauqua, PA (US);
Clayton E Schneider, Jr, Bethlehem, PA (US);
Assignee:
AT&T Bell Laboratories, Murray Hill, NJ (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072 / ; 307279 ; 307291 ; 307443 ; 307481 ;
Abstract
Set-Reset Master-Slave Flip-Flop circuitry uses a feedback circuit connected to a circuitry output terminal and to set and reset input terminals to limit the effect of spurious signals such that only signals applied to set and reset terminals which are of the appropriate state at least prior to and during the transition of a clock signal from the low to the high state cause the output terminals of the Flip-Flop to be set to or maintained in preselected levels.