The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 1985

Filed:

Jun. 26, 1979
Applicant:
Inventors:

Kunio Seki, Tokyo, JP;

Ritsuji Takeshita, Hino, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 79 ; 361 98 ; 3302 / ;
Abstract

Two output transistors constituting a push-pull output amplifier circuit are connected in series between a power supply and a grounded point, and an output terminal is disposed at a point where the two output transistors are commonly connected. An operation detector circuit detects the operation of one output transistor. A level detector circuit detects a d-c voltage level at the output terminal. The two output transistors are driven by a drive circuit in a push-pull manner. The output of the operation detector circuit and the output of the level detector circuit control the drive circuit via a control circuit. When the operation detector circuit detected the fact that the operation of one output transistor has deviated beyond a predetermined detection level, the control circuit works to confine the operation of the abovementioned output transistor within a predetermined restriction level via the drive circuit. The power loss in the restriction level is smaller than the power loss in the detection level. During a period in which the output terminal is short-circuited to the grounded point in a d-c manner, the level detector circuit so controls the control circuit that the operation of the abovementioned one output transistor is confined within the restriction level.


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