The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 1985

Filed:

Mar. 07, 1983
Applicant:
Inventor:

Derek F Bowers, Santa Clara, CA (US);

Assignee:

Precision Monolithics, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323315 ; 307297 ;
Abstract

An integrated current mirror circuit in which a compensation transistor is added in each stage of the mirror to compensate for the base-substrate leakage currents of the other transistors in the mirror circuit and to keep the circuit operative even at high temperatures and low current levels. Each compensation transistor is matched with the other transistors in its stage and has its collector-emitter circuit connected between a voltage source terminal and the common base connection of the other transistors. The base of each compensation transistor is unconnected to the remainder of the circuit but exhibits a base-substrate leakage current which is employed in the compensation scheme.


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