The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 1985
Filed:
May. 22, 1981
Gerald F Clancy, Saratoga, CA (US);
Ronald H Gruner, Cary, NC (US);
Stephen I Schleimer, Chapel Hill, NC (US);
Craig J Mundie, Cary, NC (US);
Steven J Wallach, Saratoga, CA (US);
Walter A Wallach, Jr, Raleigh, NC (US);
John K Ahlstrom, Mountain View, CA (US);
Michael S Richmond, Pittsboro, NC (US);
David H Bernstein, Ashland, MA (US);
Richard G Bratt, Wayland, MA (US);
Data General Corporation, Westboro, MA (US);
Abstract
A digital computer system having a memory for storing and providing data including instructions and a processor for processing data in response to the instructions and providing memory operation specifiers to the memory which specify an address of a data item and the memory operation to be performed on it. The instructions in the digital computer system include operation codes belonging to more than one set of operation codes and names representing items to be processed in the operation specified by the operation code. The data in memory further includes name table entries. Each name table entry corresponds to a name and contains information specifying the address of the item represented by the name. The processor includes apparatus for decoding each operation code in response to the operation code and to a dialect value contained in the decoding apparatus which specifies which operation code set the operation code being decoded belongs to. The processor further includes apparatus for processing names by resolving them to produce the addresses specified by their corresponding name table entries and control apparatus responsive to the instruction decoding apparatus and the name processing apparatus for controlling the processor and providing memory operation specifiers containing the addresses produced by the name processing means to the memory.