The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 1985

Filed:

Jan. 31, 1984
Applicant:
Inventor:

Setsuo Kurafuji, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365190 ; 365203 ;
Abstract

A static RAM, including a bit-line-charging transistor connected, in parallel to the load transistor, between each bit line and the power supply. These bit-line-charging transistors are controlled by a control signal generator circuit, which provides a timed pulse to their gates at the conclusion of each write cycle. The width of this timed pulse is selected such that bit lines which have been driven to a low level (e.g., zero volts) during a write cycle are rapidly recharged to the low level (e.g., 2.5 volts) to which they might have been driven during a read cycle. Thus, reverse readout operations (e.g., where a '1' is read immediately after a '0' has been written) no longer pose an obstacle to improving read operation speed, and speed and density can be improved.


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