The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 1985
Filed:
Jun. 08, 1981
Paul L Sinclair, Houston, TX (US);
Schlumberger Technology Corporation, Houston, TX (US);
Abstract
A digital induction resistivity logging system is disclosed for digitally measuring phase components in a receiver signal generated in response to eddy currents flowing in the earth's sub-surface formations. The induction logging system includes a central processing unit (CPU) located at the surface for receiving digital signals from a digital induction logging tool located downhole, and for analyzing the received data. The CPU supplies command and control signals to the induction logging tool to specify operating modes and parameters for obtaining the digital signals. The system further includes a digital telemetry system associated with a wireline cable for transmitting and receiving data between the induction tool and the CPU. The digital induction tool includes a digital sinewave generator for generating a highly phase stable, low distortion transmitter signal whose frequency is selectable from at least two of transmitter frequencies. Selection of the transmitter frequency may be based on optimizing the measurement of a characteristic of the formations being encountered by the tool. Automatic phase compensation is included to dynamically compensate for both static and dynamic temperature dependent phase errors due to circuits of the tool involved in the component measurements. A floating point analog-to-digital convertor capable of responding to the wide dynamic range in the detected phase component signals is provided to convert the phase detector output into digital signals for use by the CPU.