The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 1985
Filed:
Oct. 14, 1983
Ralph C Mitchell, Jr, Kingston, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
In this programmable logic array (PLA), internal array lines are shared by several sets of input array lines. Each set of input lines operates on a separate time phase. This PLA construction is denser than some other arrangements of multiple PLAs, and some of its components are reduced in number as compared with multiple independent PLAs for the same functions. A new pipelined multiplier is disclosed as one application for the PLA of this invention. In another application for this PLA, the array lines are shared where the array locations that are otherwise required for don't care states have been eliminated and a denser construction is provided.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile