Multi sub-channel adapter with single status/address register

Abstract

An improved adapter for a programmed control unit arranged to be operated in facilitating I/O operations between one or more I/O devices and a CPU through a channel. The improved adapter includes a local store which store has a hardware register dedicated to store device status and the associated address in connection with test I/O commands. Thus, in accordance with the method of the invention on receiving a status request the improved adapter responds immediately with a response indicating that the information is not immediately available, for example, a busy response. The improved adapter initiates an interrupt to the program control unit to obtain the requested status information, which is then stored in dedicated hardware registers of the local store. On the next subsequent test I/O command to the same address, the improved adapter responds with the status as read from the dedicated hardware register. In another aspect the invention provides an improved adapter which includes communication path means, for example hardware registers, passing data to and from the channel and attached devices, and a further hardware register of sufficient capacity to store a status word and an associated address. The adapter also includes a bus for transferring a status word and associated address from the attached control unit in response to a channel received command to the further hardware register and, control circuitry which is responsive to a subsequent status request and command associated with the associated address, for placing the status word from the further hardware register on the channel. The adapter supports both host or control unit initiated I/O status transfers, i.e. both synchronous and asynchronous.