High voltage semiconductor devices comprising integral jfet

Abstract

A P-N diode includes a P.sup.- substrate with a thin N.sup.- epitaxial layer thereon. A P.sup.+ isolation region surrounds the periphery of the N.sup.- epitaxial layer and is integrally connected to the P.sup.- substrate. An N.sup.+ cathode region extends into the N.sup.- epitaxial layer from the upper surface of such layer. A P.sup.+ anode region extends into the N.sup.- epitaxial layer from its upper surface and surrounds the N.sup.+ cathode region. A further P.sup.+ region extends into the N.sup.- epitaxial layer from its upper surface and surrounds the N.sup.+ cathode region, and, in turn, is surrounded by the P.sup.+ anode region. The further P.sup.+ region is biased at the same potential as the P.sup.- substrate. An N.sup.+ buried layer is situated between the P.sup.- substrate and the N.sup.- epitaxial layer, beneath the P.sup.+ anode region, and surrounds the N.sup. + cathode region. An N.sup.+ sinker region extends into the N.sup.- epitaxial layer from its upper surface and terminates in integral contact with the N.sup.+ buried layer, the N.sup.+ sinker region surrounding the P.sup.+ anode region, and, in turn, being surrounded by the P.sup.+ isolation region. The N.sup.+ buried layer reduces parasitic currents in the P-N diode, and the further P.sup.+ region, appropriately biased, enables the P-N diode to block current at high reverse voltages. An N-P-N transistor is structurally similar to the P-N diode, having an additional N.sup.+ emitter region diffused into a P.sup.+ base region, corresponding to the P.sup.+ anode region of the P-N diode.