The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 1985
Filed:
Sep. 29, 1982
Shoichi Shimizu, Fujisawa, JP;
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Abstract
A logic circuit using depletion-mode field effect switching transistors, wherein, a plurality of logic elements respectively having at least one depletion-mode switching FET are connected in series. The source electrodes of the switching FETs are maintained at a voltage higher by a predetermined voltage than ground potential by the Schottky diode and connected commonly to each other. The switching FETs are connected at the drain electrodes through active loads to a power source terminal supplied with one type of external DC power source voltage. The drain potential of the switching FETs is level-shifted to a predetermined voltage higher than the gate potential of the FETs in the next stage. The FETs are provided between the diodes and ground to prevent the variation in the level shift voltage.