The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 1984
Filed:
Feb. 28, 1983
Charles E Rettig, Brookfield, WI (US);
MagneTek Inc., Milwaukee, WI (US);
Abstract
A voltage limit circuit for phase controlled rectifiers avoids shoot-through and limit cycling conditions by limiting the d.c. output voltage of the rectifier bridge. The circuitry follows a voltage reference signal as long as the reference signal is less than an input derived from the a.c. voltage applied to the bridge, reduced by the volt-seconds required for commutation. Should the reference signal exceed the a.c. derived input, the a.c. derived input limits the maximum available d.c. voltage. To this end, a voltage reference signal provides an output signal corresponding to the desired output voltage of the bridge. A slew limit circuit limits the rate by which the output signal may be changed. A magnitude limit circuit is coupled to the output of the slew limit circuit and provides a reference signal for the firing circuit of the rectifier bridge. The magnitude limit circuit receives the a.c. voltage derived limiting signal for limiting the reference signal to a magnitude not greater than that established by the limiting signal. The limiting signal is obtained in a commutating volt-seconds subtraction circuit that reduces an appropriately scaled a.c. voltage by an amount necessary to establish the volt-seconds required for commutation of the controlled rectifiers.