The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 1984

Filed:

Dec. 16, 1983
Applicant:
Inventors:

Roberto Fossati, Turin, IT;

Vincenzo Lazzari, Leini-Torino, IT;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ; H04M / ; H04M / ;
U.S. Cl.
CPC ...
370 32 ; 370 24 ; 1791702 ;
Abstract

In order to suppress noise due to reflected outgoing signals in a telephone receiver of a system for the bidirectional transmission of digitized voice signals over a two-wire telephone line connected by a hybrid coil to an outgoing section and an incoming section of a subscriber station or of an exchange, a shift register loaded with several (e.g. five) consecutive transmitted bits from the outgoing section addresses the cells of a memory containing the digitized amplitudes of corrective signals assigned to the several bit combinations which may be present at any time in that register. The corrective signal read out from the memory during each bit period is subtracted in the incoming section from an arriving signal and the result is fed on the one hand to a receiver and on the other hand to an algebraic adder as a modifying signal incrementing or decrementing, if need be, the contents of the corresponding cell during a writing interval which is a small fraction of a bit period. As the arriving signals are digitized with a balanced code (e.g. AMI), their presence does not significantly affect the magnitude of the modifying signal emitted by the adder. If this circuit arrangement is part of a subscriber station, all active components are timed by clock pulses extracted from the incoming bit stream; if it is part of an exchange, only the receiving section is controlled by extracted clock pulses while the reading and writing in the memory is controlled by pulses from a master clock, divergences between the two clock-pulse trains being compensated by the introduction of delays under the control of a coincidence circuit.


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