Data processing system having interlinked fast and slow memory means and

Abstract

A data processing system has two independent read only memories. Each read only memory (ROM) has an individual associated program counter. Table lookup is accomplished by having an instruction signal pattern output from one ROM conditionally advance the program counter of the other ROM. Upon completion of the output from the first ROM, control is transferred to the second ROM, with the second ROM's program counter containing a predetermined value equivalent to the table lookup value desired, or to a branch word pointing to a value or routine in the second ROM. In the preferred embodiment, the execution of a particular data signal pattern (CALL) in a fast read only memory (said first ROM) causes the program counter for the second ROM (main program counter) to advance one step forward in the program count sequence. Thus, for example, if a number represents the table entry value and is decremented in the fast ROM, decrementing once during each execution of a CALL instruction signal pattern in said fast ROM, then upon return to the main ROM, the main program counter will point to the desired entry point in the main ROM. Thus, the data signal stored pattern (routine) stored in the fast ROM may be any routine which executes a variable number of CALLs and the main ROM entry point may contain values to be directly used or may contain data signal patterns representing the beginning of new program routines in the main ROM.