The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 1984

Filed:

Dec. 23, 1982
Applicant:
Inventors:

John A Flink, Santa Clara, CA (US);

Charles L Vinn, Milpitas, CA (US);

Assignee:

Raytheon Company, Lexington, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330253 ; 330261 ;
Abstract

A differential amplifier is provided having a pair of input transistors with first electrodes connected to a first voltage potential through a first current source, a second pair of electrodes providing a pair of input terminals for the differential amplifier, and a third pair of electrodes connected to a pair of terminals, the current produced by the first current source passing through the first and third electrodes of the pair of input transistors into the pair of terminals in a ratio related to the difference in voltage of input signals fed to the pair of input terminals and the degree of mismatch in the pair of input transistors. A selector network injects a compensation current substantially equal to the difference in the currents passing through the pair of input transistors when the voltages at the pair of inputs are equal, and which results from a mismatch in such pair of input transistors, into a selected one of the pair of terminals. A balanced current mirror has an input coupled to a first one of the pair of terminals and an output coupled to a second one of the pair of terminals for forcing current passing into the second one of the pair of terminals through the output of the current mirror to be substantially equal to current passing into the first one of the pair of terminals to the input of the current mirror with an output current passing from the second one of the pair of terminals to an output stage, such output current being substantially zero when the voltages at the pair of input terminals are equal to thereby compensate for the difference in the currents passing through the pair of input transistors as a result of the mismatch in the pair of input transistors.


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