The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 1984
Filed:
Mar. 08, 1982
Applicant:
Inventor:
Lee T Thorsrud, Saint Paul, MN (US);
Assignee:
Sperry Corporation, New York, NY (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 49 ; 307471 ;
Abstract
Each of the exclusive OR (XOR, or odd parity) and exclusive NOR (XNOR, or even parity) logical functions as between two signals input in both normal and inverted form is generated from separate logic circuits of two transfer gates implemented in complementary metal oxide semiconductor (CMOS) very large scale integrated circuit (VLSIC) technology. Replications of paired such XOR and XNOR logical circuits within a parity tree allow parity generation/detection as between 2.sup.N signals input in both normal and inverted form in only N propagation stages of typically average 0.9 nanosecond delay each stage when implemented in 11/4 micron feature size CMOS VLSIC.