The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 1984

Filed:

Dec. 28, 1981
Applicant:
Inventors:

Giora Yaron, Cupertino, CA (US);

Ying K Shum, Cupertino, CA (US);

Ury Priel, Cupertino, CA (US);

Jayasimha S Prasad, Sunnyvale, CA (US);

Mark S Ebel, Santa Clara, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 235 ; 357 239 ; 357 41 ; 357 55 ; 357 59 ; 365185 ;
Abstract

An electrically programmable and eraseable memory cell in which charge carriers are tunnelled between a floating gate and a drain region in the substrate through a thin oxide tunnel region, the borders of said tunnel region being confined to a small area well inside the borders of both the drain region and the floating gate. Dual paths are utilized to connect the tunnel region of the gate to the memory cell region of the gate.


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