The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 1984

Filed:

Dec. 23, 1981
Applicant:
Inventor:

Peter Fazekas, Munich, DE;

Assignee:

Siemens Aktiengesellschaft, Berlin & Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; G01N / ;
U.S. Cl.
CPC ...
3241 / ; 250310 ; 3241 / ; 371 15 ;
Abstract

A method and apparatus for conducting a fast internal logic check of integrated circuits whereby the operations on all data lines of a data bus can be simultaneously represented employ a pulsed electron beam as a measuring probe, a scan generator for changing the position of the measuring probe, an evaluator for the potential-contrast signal, a computer or logic analyzer for evaluating the measured values, and a sequence control device for controlling the sequence of operation of the method and device. Given a fixed phase relation of the program cycle of the integrated circuit to be checked, the pulsed electron beam is successively directed to different test locations and the potential-contrast signal for each test location is registered and logically evaluated. The test results gained at the various phase relations are relayed to the logic analyzer and evaluated therein.


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