The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 1984
Filed:
Dec. 10, 1981
Howard C Kirsch, Colorado Springs, CO (US);
Mostek Corporation, Carrollton, TX (US);
Abstract
A clock generator circuit (10) receives an input signal PPC.0. and generates a delayed clock output signal PC.0.. The circuit (10) is set to an initial condition by a precharge signal PC.0.R prior to a transition of the input signal PPC.0.. A time delay signal is produced at a node (26) by operation of transistors (18, 28). The transition of the input signal PPC.0. produces a bootstrapped voltage at a capacitor (68). The delay signal activates a transistor (80) to couple the bootstrapped voltage to the gate terminal of an output transistor (88). The gate terminal of the output transistor (88) is driven directly from a low voltage state to a boosted high voltage state. This causes the output signal PC.0. to be driven from an initial low voltage state to the power supply voltage V.sub.cc without intervening steps. The output transistors (88, 90) of circuit (10) are never activated at the same time, thereby preventing any current spike from being propagated through the circuit (10).