The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 1984
Filed:
Dec. 21, 1981
Applicant:
Inventors:
Glenn E Noufer, Austin, TX (US);
William J Donoghue, Round Rock, TX (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307475 ; 307291 ; 307297 ; 307363 ; 307451 ;
Abstract
A TTL to CMOS input buffer accomplishes buffering a TTL signal to a CMOS signal without requiring current flow through a CMOS input inverter in a static condition by introducing a reference voltage to match the lowest level of a logic '1' of the TTL signal. The input inverter has a P channel transistor which, by having a source at the reference voltage, does not turn on when the TTL signal is at the lowest level of a logic '1'. The reference voltage is selected to be less than the lowest level of a logic '1' minus the threshold voltage of the P channel transistor.