The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 1984

Filed:

Jul. 06, 1982
Applicant:
Inventors:

Marion A Keyes, IV, Chagrin Falls, OH (US);

William L Thompson, Chardon, OH (US);

Assignee:

The Babcock & Wilcox Company, New Orleans, LA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06G / ; G06G / ;
U.S. Cl.
CPC ...
328144 ; 328143 ; 364752 ;
Abstract

Circuitry for extracting the square root of an incoming voltage signal is disclosed. The circuit (10) utilizes a four-bit up/down counter (14) to control the output duty cycle of a pair of four-bit rate multipliers (16, 18) connected in a cascaded configuration. The output of the second rate multiplier (18), which is related to the square of the up/down counter value, is used to control the mode of the counter (14) so as to track the incoming voltage signal. Inasmuch as the square of the up/down counter value is tracking the incoming voltage signal, the output duty cycle of the first rate multiplier (16) in the cascaded pair is the square root of the incoming voltage signal which is subsequently converted into analog form. The circuit also utilizes a 'dithering' technique so that the resulting square root output signal has greater than four-bit accuracy.


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