The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 1984

Filed:

Aug. 18, 1980
Applicant:
Inventor:

Sing W Chin, Walnut Creek, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307530 ; 307355 ; 307279 ;
Abstract

A pair of CMOS inverters are cross coupled in a latching configuration. Both inverter supply terminals are coupled to complementary toggles that can render the inverters operative or inoperative. First, the inverters are rendered inoperative. An output switch is coupled between the output nodes so that the inverter's output nodes can be driven to the same potential, thus canceling any offset voltage. An input switch produces sampling over a time interval that extends beyond the output switch on period. After the sampling period, the toggles are operated to turn the inverters on and to produce a latch state determined by the potential change present in the sampling interval.


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