The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 1984

Filed:

Apr. 18, 1980
Applicant:
Inventors:

Munehiro Uratani, Kashihara, JP;

Setsufumi Kamuro, Yamatokoriyama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365195 ; 365230 ;
Abstract

An integrated circuit comprises a memory array containing a plurality of memory cells arranged in a matrix shape having rows and columns, and memory array addressing circuitry for addressing such array in accordance with addressing signals. Said addressing circuitry comprises a number of gates responsive to addressing signals for addressing the array. Only one of the number of gates has a control signal applied thereto which places the memory array in such a condition that none of the memory cells is selected for addressing purposes, and the remaining gates do not have a control signal applied even under the same situation, wherein none of the memory cells is selected for addressing purposes. The gates comprise an AND gate, an NAND gate, an NOR gate or the like.


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