The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 1984
Filed:
Jul. 16, 1982
Robert S Wrathall, Tempe, AZ (US);
Motorola Inc., Schaumburg, IL (US);
Abstract
An input buffer to which an ECL logic swing is applied through a voltage level shifter to one input of a differential pair of switching devices, the other input of the differential pair being a voltage level shifted by the same amount from an ECL logic reference voltage. The output across a load device coupling one of the switching devices to a collector voltage source drives the input of a conventional inverter coupling a reduced MOS logic voltage supply to the collector voltage source. An output buffer to which a reduced MOS voltage swing logic input is applied to the input of a conventional inverter coupling a reduced MOS logic voltage supply to a collector voltage source. The output of the inverter is applied to one input of a differential pair of switching devices having the other input thereto held at a reference level defined by a voltage divider. The output of the differential pair across a load device coupling one of the switching devices to the collector voltage source is level shifted through another switching device to the circuit output.