The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 1984

Filed:

Mar. 17, 1982
Applicant:
Inventor:

John P Rutkoski, Stow, OH (US);

Assignee:

Transat Corp., Shaker Heights, OH (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ; H03L / ;
U.S. Cl.
CPC ...
324 56 ; 331-2 ; 324 / ;
Abstract

A heterodyne zero-phase detector (A) produces a phase output signal whose phase varies with the phase difference between a selectively variable test signal and the same selectively variable test signal as modified by being applied to a piezoelectric resonator (B). The heterodyne zero-phase detector includes a voltage controlled oscillator (16) for generating the selectively variable test signal, a first balanced mixer (32) for mixing the selectively variable test signal with a selectively variable heterodyne reference signal, a second balanced mixer (34) for mixing the selectively variable test signal as modified by the piezoelectric resonator with the variaable heterodyne reference signal, and a phase detector (50) for receiving the output of the balanced mixers to produce the phase output signal. A characteristic frequency locking feedback loop (C) feeds back the phase output signal to control the voltage controlled oscillator to vary the selectively variable test signal in such a manner that the phase output signal approaches zero. A fixed test frequency locking feedback loop (D) locks the fixed frequency test signal from the first and second balanced mixers to the preselected fixed frequency. The fixed test signal frequency locking feedback loop includes a variable heterodyne signal generator (70) and a heterodyne signal generator control (72) for controlling the heterodyne reference signal generator. The heterodyne reference signal generator is connected with one of the balanced mixers to receive one of the fixed frequency test signals therefrom and to adjust the heterodyne reference signal generator such that the frequency of the fixed frequency test signal is held at the preselected fixed frequency. In this manner, the heterodyne reference signal is held to the variable test signal offset by a multiple of the preselected fixed frequency.


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