The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 1984

Filed:

Feb. 25, 1981
Applicant:
Inventors:

Tetsuya Iida, Yokohama, JP;

Tatsuo Sakaue, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H03K / ;
U.S. Cl.
CPC ...
377 79 ; 377 81 ; 307482 ;
Abstract

A dynamic shift register circuit comprises an input terminal and an output terminal. It further comprises a first transfer gate circuit connected to the input terminal for receiving an input signal and transferring the input signal under the control of a first clock signal; an inverter circuit for inverting a level of an output signal of the first transfer gate circuit; a second transfer gate circuit connected to the inverter circuit for receiving an output signal of the inverter circuit and transferring the same under the control of a second clock signal which has a level opposite to that of the first clock signal; a signal follower circuit for producing an output signal having a level which follows a level of the output signal of the first transfer gate circuit; and a logic circuit connected to first and second power source voltages. The logic circuit is made operative by an output signal of the signal follower circuit and produces an inverter function at the output terminal, in response to an output signal of the second transfer gate circuit. The logic circuit comprises a capacitor element one terminal of which is connected to the output terminal of the signal follower circuit and the other terminal of which is connected to said output terminal of the dynamic shift register.


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