The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 1984

Filed:

Jan. 29, 1982
Applicant:
Inventors:

Ta-Tung Lin, deceased, late of Harleysville, PA (US);

by Meei Lin, Executrix, North Wales, PA (US);

George A Fedde, Perkiomenville, PA (US);

Assignee:

Sperry Corporation, New York, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06K / ;
U.S. Cl.
CPC ...
382-8 ; 382 25 ;
Abstract

An apparatus for analyzing line sequential binary data generated by scanning a printed circuit board with a scanning laser apparatus is disclosed. The circuit board contains conducting strips on an electrically insulated substrate. The conductors can be characterized by the number and the locations of their corners and by their widths and by the widths of the substrate occurring between parallel and spaced apart conductors. The line sequential data when viewed together forms a two dimensional image array of the circuit board and the two dimensional array contains information about the conducting corners, widths, etc. The line sequential binary data is first smoothed by smoothing circuits to eliminate errors due to noise, scanning equipment tolerances, etc. Then the smoothed data in line sequential format is transmitted to a corner recognition and pairing circuit where the corner features of the conductors are recognized. Because of digitizing errors, a corner feature often appears as two, three or more vertically and/or horizontally adjacent corner pairs. The excess corners are eliminated by the corner recognition and pairing circuit. At the same time, a line/space width error detection circuit portion of the apparatus examines the widths of the horizontal and vertically directed conducting strips and the spaces between them. If any of the conductors or spaces fall below a predetermined minimum over a predetermined length of the conductor or strip an error signal is generated.


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