The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 1984
Filed:
Dec. 02, 1981
Akira Nagami, Tokyo, JP;
Nippon Electric Co., Ltd., Tokyo, JP;
Abstract
A latch circuit has first to fourth nodes. The first node is supplied with a logic signal and the second node is charged at a first potential. A potential at the third node is discharged to the second potential. The fourth node is charged to the first potential. This all happens during a first period, after which, and during a second period, a potential at the second node is transferred to the third node. An inverter transistor is responsive to a level of the logic signal at the first node for discharging a potential of the second node to a second potential when the logic signal level is in the first potential and for retaining the first potential of the second node when the logic signal level is in the second potential. A transfer between the fourth and the first nodes is responsive to the second potential at the third node for discharging the potential of the fourth node to the second potential. A true and a complement signals of a large amplitude are established at the fourth and second nodes.